1. Field of the Invention
The present invention relates to a method of measuring overlay on a substrate including two structures manufactured by way of a double patterning technique. It also relates to a method of manufacturing two structures on a substrate which can be used to measure overlay.
2. Related Art
A lithographic apparatus is a machine that applies a desired pattern onto a substrate, usually onto a target portion of the substrate. A lithographic apparatus can be used, for example, in the manufacture of integrated circuits (ICs). In that instance, a patterning device, which is alternatively referred to as a mask or a reticle, may be used to generate a circuit pattern to be formed on an individual layer of the IC. This pattern can be transferred onto a target portion (e.g. comprising part of, one, or several dies) on a substrate (e.g. a silicon wafer). Transfer of the pattern is typically via imaging onto a layer of radiation-sensitive material (resist) provided on the substrate. In general, a single substrate will contain a network of adjacent target portions that are successively patterned. Known lithographic apparatus include so-called steppers, in which each target portion is irradiated by exposing an entire pattern onto the target portion at one time, and so-called scanners, in which each target portion is irradiated by scanning the pattern through a radiation beam in a given direction (the “scanning”-direction) while synchronously scanning the substrate parallel or anti-parallel to this direction. It is also possible to transfer the pattern from the patterning device to the substrate by imprinting the pattern onto the substrate.
To improve the critical dimension (CD) of modem semiconductors, a technique called Double Patterning (DP) is used. In this technique two exposures are executed for one single layer on the substrate. For each exposure a specific mask is used that together with the other mask forms the desired pattern. Instead of Double Patterning, so-called Multiple Patterning is used wherein more than two exposures are used to form the desired pattern in a layer on a substrate.
Double patterning is used with critical dimensions of less than 100 nm. When forming a second structure next to a first structure in order to form a desired pattern, an overlay error may be present that is defined as the difference between the actual position of the second structure relative to the desired position of the second structure. The overlay error occurs due to alignment issues and/or optical errors in a lithographic apparatus. The overlay error will depend on the position on a substrate. In case of double patterning, the overlay error is referred to as Double Patterning Overlay error, i.e. DPTO error. To indicate that this error may vary as a function of the position on a substrate, below the term DPTO(x,y) is used.
So-called CDU wafers (CDU-critical dimension uniformity) are used to measure the DPTO(x,y) of a system. A CDU wafer is measured using for example a Scanning Electron Microscope (SEM) to obtain images of the CDU wafer at multiple points on the substrate. The CDU wafer may for example comprise a pattern of parallel lines that is formed by a double patterning technique, where elements (i.e. lines) of a first structure alternate with elements of a second structure. The first structure is formed using a first exposure and the second structure is formed at a second exposure. The images can be made around predetermined points (xi, yi) on the substrate. The images are input for an image processor that is arranged to measure the DPTO for each image. To do this, the image processor needs to identify the first structure from the second structure. A possible solution is to instruct the SEM to scan areas around the predetermined points (xi,yi) so that the predetermined points (xi, yi) are positioned at a predefined position on each image (for example the exact centre of the image). Knowing that one of the lines of the first structure (or the second structure) is positioned at exactly position (xi, yi), it can be concluded by the image processor that the line in the centre of the image is part of the first structure. This information is needed to calculate the correct DPTO(x,y). However, due limitations in the hard- and software of the metrology tool, the identification of structures might be unreliable, resulting in errors of the calculated overlay error DPTO(x,y).